Semiconductor integrated circuits are known in the art. Typically, integrated circuits include a package which contains one or more substrates or “dies”. The substrates may be provided with electronic circuits and be provided with pads via which the substrates (and the electronic circuits) can be connected to the outside world, e.g. via bond-wires that are connected to pins which extend from the package inside to the exterior of the package.
However, a general problem is that current may be injected into the substrate, for example when a pad is driven below or above the supply voltage, which may affect the operation of the electronic circuit.
Depending on the arrangement of doped substrate and diffusion wells, a minority carrier current injection may be at least partly hindered while still allowing for majority carrier injection and vice versa. For example, embedding a pin with a connection to an n-diffusion sitting in a pwell sitting in an n-well on a p-type substrate (triple well technology or isolated pwell technology) may help preventing negative current injection into the substrate, while still enabling positive current injection via a p+ diffusion connected to the pin sitting in an nwell sitting in the p-type substrate, potentially triggering malfunction due to latch-up effects caused by parasitic structures.
In order to prevent the injected current from affecting the operation, it is known to implement a so called “guard ring” which shields the electronic circuit from the injected current. For example, FIG. 1 shows a schematic diagram of an example of a semiconductor device 10 with a guard ring 18 as a passive protection for an electronic circuit 14 that includes a circuit part 12 sensitive to current injected through a pad 16 of the device.
For example, U.S. Pat. No. 5,168,340 describes a passive latch-up protection improvement in which polysilicon lines cross or cut a guard-ring around a logic circuit. When an amount of injected current exceeds a certain magnitude, latch up of the transistors in the logic circuit occurs and the transistors are shut off.
German patent application publication DE 199 58 204 A1 discloses an integrated circuit provided with a sensor which senses the voltage of a pin and a transistor which is controlled by the sensor to block the connection between the pin and a core part of the integrated circuit when the voltage exceeds a first voltage threshold or comes below a second voltage threshold.
However, this does not provide a protection of the core part to currents flowing from the pin to the core part via other paths than the connection. In addition, if despite the blocked connection the core part is subject to an injected current, the operation of the core part can be affected in an unpredictable manner. Furthermore, since the path from the pin to the core parts is cut, a normal functioning of the device is no longer possible.
Applicant's copending and not pre-published International patent applications PCT/IB2007/054949 and PCT/IB2008/054987 disclose a semiconductor device which includes a substrate on which an electronic circuit is provided. Two or more pads may be present which can connect the electronic circuit to an external device outside the substrate. A current meter is electrically in contact with at least a part of the substrate and/or the pad. The meter can measure a parameter forming a measure for an aggregate amount of a current flowing between the substrate and said pads. A control unit is connected to the current meter and the electronic circuit, for controlling the electronic circuit based on the measured parameter.